circuit md5 :
  module md5round :
    input clock : Clock
    input reset : UInt<1>
    input io_a : UInt<32>
    input io_b : UInt<32>
    input io_c : UInt<32>
    input io_d : UInt<32>
    input io_m : UInt<32>
    input io_s : UInt<5>
    input io_t : UInt<32>
    input io_r : UInt<2>
    output io_next_a : UInt<32>

    node _T = eq(UInt<1>("h0"), io_r) @[md5round.scala 34:16]
    node _res_T = and(io_b, io_c) @[md5round.scala 19:9]
    node _res_T_1 = not(io_b) @[md5round.scala 19:18]
    node _res_T_2 = and(_res_T_1, io_d) @[md5round.scala 19:29]
    node _res_T_3 = or(_res_T, _res_T_2) @[md5round.scala 19:14]
    node _res_T_4 = add(io_a, _res_T_3) @[md5round.scala 36:19]
    node _res_T_5 = tail(_res_T_4, 1) @[md5round.scala 36:19]
    node _res_T_6 = add(_res_T_5, io_m) @[md5round.scala 36:41]
    node _res_T_7 = tail(_res_T_6, 1) @[md5round.scala 36:41]
    node _res_T_8 = add(_res_T_7, io_t) @[md5round.scala 36:48]
    node _res_T_9 = tail(_res_T_8, 1) @[md5round.scala 36:48]
    node _T_1 = eq(UInt<1>("h1"), io_r) @[md5round.scala 34:16]
    node _res_T_10 = and(io_b, io_d) @[md5round.scala 23:9]
    node _res_T_11 = not(io_d) @[md5round.scala 23:22]
    node _res_T_12 = and(io_c, _res_T_11) @[md5round.scala 23:19]
    node _res_T_13 = or(_res_T_10, _res_T_12) @[md5round.scala 23:14]
    node _res_T_14 = add(io_a, _res_T_13) @[md5round.scala 39:19]
    node _res_T_15 = tail(_res_T_14, 1) @[md5round.scala 39:19]
    node _res_T_16 = add(_res_T_15, io_m) @[md5round.scala 39:41]
    node _res_T_17 = tail(_res_T_16, 1) @[md5round.scala 39:41]
    node _res_T_18 = add(_res_T_17, io_t) @[md5round.scala 39:48]
    node _res_T_19 = tail(_res_T_18, 1) @[md5round.scala 39:48]
    node _T_2 = eq(UInt<2>("h2"), io_r) @[md5round.scala 34:16]
    node _res_T_20 = xor(io_b, io_c) @[md5round.scala 27:8]
    node _res_T_21 = xor(_res_T_20, io_d) @[md5round.scala 27:12]
    node _res_T_22 = add(io_a, _res_T_21) @[md5round.scala 42:19]
    node _res_T_23 = tail(_res_T_22, 1) @[md5round.scala 42:19]
    node _res_T_24 = add(_res_T_23, io_m) @[md5round.scala 42:41]
    node _res_T_25 = tail(_res_T_24, 1) @[md5round.scala 42:41]
    node _res_T_26 = add(_res_T_25, io_t) @[md5round.scala 42:48]
    node _res_T_27 = tail(_res_T_26, 1) @[md5round.scala 42:48]
    node _T_3 = eq(UInt<2>("h3"), io_r) @[md5round.scala 34:16]
    node _res_T_28 = not(io_d) @[md5round.scala 30:16]
    node _res_T_29 = or(io_b, _res_T_28) @[md5round.scala 30:13]
    node _res_T_30 = xor(io_c, _res_T_29) @[md5round.scala 30:8]
    node _res_T_31 = add(io_a, _res_T_30) @[md5round.scala 45:19]
    node _res_T_32 = tail(_res_T_31, 1) @[md5round.scala 45:19]
    node _res_T_33 = add(_res_T_32, io_m) @[md5round.scala 45:41]
    node _res_T_34 = tail(_res_T_33, 1) @[md5round.scala 45:41]
    node _res_T_35 = add(_res_T_34, io_t) @[md5round.scala 45:48]
    node _res_T_36 = tail(_res_T_35, 1) @[md5round.scala 45:48]
    node _GEN_0 = mux(_T_3, _res_T_36, UInt<1>("h0")) @[md5round.scala 34:16 45:11 33:7]
    node _GEN_1 = mux(_T_2, _res_T_27, _GEN_0) @[md5round.scala 34:16 42:11]
    node _GEN_2 = mux(_T_1, _res_T_19, _GEN_1) @[md5round.scala 34:16 39:11]
    node _GEN_3 = mux(_T, _res_T_9, _GEN_2) @[md5round.scala 34:16 36:11]
    node res = _GEN_3 @[md5round.scala 32:17]
    node _io_next_a_T = dshl(res, io_s) @[md5round.scala 48:29]
    node _io_next_a_T_1 = sub(UInt<6>("h20"), io_s) @[md5round.scala 48:61]
    node _io_next_a_T_2 = tail(_io_next_a_T_1, 1) @[md5round.scala 48:61]
    node _io_next_a_T_3 = dshr(res, _io_next_a_T_2) @[md5round.scala 48:52]
    node _io_next_a_T_4 = or(_io_next_a_T, _io_next_a_T_3) @[md5round.scala 48:45]
    node _io_next_a_T_5 = add(io_b, _io_next_a_T_4) @[md5round.scala 48:21]
    node _io_next_a_T_6 = tail(_io_next_a_T_5, 1) @[md5round.scala 48:21]
    io_next_a <= bits(_io_next_a_T_6, 31, 0) @[md5round.scala 48:13]

  module md5 :
    input clock : Clock
    input reset : UInt<1>
    input io_in : UInt<128>
    input io_in_valid : UInt<1>
    output io_out : UInt<128>
    output io_out_valid : UInt<1>
    output io_ready : UInt<1>

    inst r of md5round @[md5.scala 42:17]
    node A_K_0 = asUInt(asSInt(UInt<32>("hd76aa478"))) @[defs.scala 25:67]
    node A_K_1 = asUInt(asSInt(UInt<32>("he8c7b756"))) @[defs.scala 25:67]
    node A_K_2 = asUInt(asSInt(UInt<32>("h242070db"))) @[defs.scala 25:67]
    node A_K_3 = asUInt(asSInt(UInt<32>("hc1bdceee"))) @[defs.scala 25:67]
    node A_K_4 = asUInt(asSInt(UInt<32>("hf57c0faf"))) @[defs.scala 25:67]
    node A_K_5 = asUInt(asSInt(UInt<32>("h4787c62a"))) @[defs.scala 25:67]
    node A_K_6 = asUInt(asSInt(UInt<32>("ha8304613"))) @[defs.scala 25:67]
    node A_K_7 = asUInt(asSInt(UInt<32>("hfd469501"))) @[defs.scala 25:67]
    node A_K_8 = asUInt(asSInt(UInt<32>("h698098d8"))) @[defs.scala 25:67]
    node A_K_9 = asUInt(asSInt(UInt<32>("h8b44f7af"))) @[defs.scala 25:67]
    node A_K_10 = asUInt(asSInt(UInt<32>("hffff5bb1"))) @[defs.scala 25:67]
    node A_K_11 = asUInt(asSInt(UInt<32>("h895cd7be"))) @[defs.scala 25:67]
    node A_K_12 = asUInt(asSInt(UInt<32>("h6b901122"))) @[defs.scala 25:67]
    node A_K_13 = asUInt(asSInt(UInt<32>("hfd987193"))) @[defs.scala 25:67]
    node A_K_14 = asUInt(asSInt(UInt<32>("ha679438e"))) @[defs.scala 25:67]
    node A_K_15 = asUInt(asSInt(UInt<32>("h49b40821"))) @[defs.scala 25:67]
    node A_K_16 = asUInt(asSInt(UInt<32>("hf61e2562"))) @[defs.scala 25:67]
    node A_K_17 = asUInt(asSInt(UInt<32>("hc040b340"))) @[defs.scala 25:67]
    node A_K_18 = asUInt(asSInt(UInt<32>("h265e5a51"))) @[defs.scala 25:67]
    node A_K_19 = asUInt(asSInt(UInt<32>("he9b6c7aa"))) @[defs.scala 25:67]
    node A_K_20 = asUInt(asSInt(UInt<32>("hd62f105d"))) @[defs.scala 25:67]
    node A_K_21 = asUInt(asSInt(UInt<32>("h2441453"))) @[defs.scala 25:67]
    node A_K_22 = asUInt(asSInt(UInt<32>("hd8a1e681"))) @[defs.scala 25:67]
    node A_K_23 = asUInt(asSInt(UInt<32>("he7d3fbc8"))) @[defs.scala 25:67]
    node A_K_24 = asUInt(asSInt(UInt<32>("h21e1cde6"))) @[defs.scala 25:67]
    node A_K_25 = asUInt(asSInt(UInt<32>("hc33707d6"))) @[defs.scala 25:67]
    node A_K_26 = asUInt(asSInt(UInt<32>("hf4d50d87"))) @[defs.scala 25:67]
    node A_K_27 = asUInt(asSInt(UInt<32>("h455a14ed"))) @[defs.scala 25:67]
    node A_K_28 = asUInt(asSInt(UInt<32>("ha9e3e905"))) @[defs.scala 25:67]
    node A_K_29 = asUInt(asSInt(UInt<32>("hfcefa3f8"))) @[defs.scala 25:67]
    node A_K_30 = asUInt(asSInt(UInt<32>("h676f02d9"))) @[defs.scala 25:67]
    node A_K_31 = asUInt(asSInt(UInt<32>("h8d2a4c8a"))) @[defs.scala 25:67]
    node A_K_32 = asUInt(asSInt(UInt<32>("hfffa3942"))) @[defs.scala 25:67]
    node A_K_33 = asUInt(asSInt(UInt<32>("h8771f681"))) @[defs.scala 25:67]
    node A_K_34 = asUInt(asSInt(UInt<32>("h6d9d6122"))) @[defs.scala 25:67]
    node A_K_35 = asUInt(asSInt(UInt<32>("hfde5380c"))) @[defs.scala 25:67]
    node A_K_36 = asUInt(asSInt(UInt<32>("ha4beea44"))) @[defs.scala 25:67]
    node A_K_37 = asUInt(asSInt(UInt<32>("h4bdecfa9"))) @[defs.scala 25:67]
    node A_K_38 = asUInt(asSInt(UInt<32>("hf6bb4b60"))) @[defs.scala 25:67]
    node A_K_39 = asUInt(asSInt(UInt<32>("hbebfbc70"))) @[defs.scala 25:67]
    node A_K_40 = asUInt(asSInt(UInt<32>("h289b7ec6"))) @[defs.scala 25:67]
    node A_K_41 = asUInt(asSInt(UInt<32>("heaa127fa"))) @[defs.scala 25:67]
    node A_K_42 = asUInt(asSInt(UInt<32>("hd4ef3085"))) @[defs.scala 25:67]
    node A_K_43 = asUInt(asSInt(UInt<32>("h4881d05"))) @[defs.scala 25:67]
    node A_K_44 = asUInt(asSInt(UInt<32>("hd9d4d039"))) @[defs.scala 25:67]
    node A_K_45 = asUInt(asSInt(UInt<32>("he6db99e5"))) @[defs.scala 25:67]
    node A_K_46 = asUInt(asSInt(UInt<32>("h1fa27cf8"))) @[defs.scala 25:67]
    node A_K_47 = asUInt(asSInt(UInt<32>("hc4ac5665"))) @[defs.scala 25:67]
    node A_K_48 = asUInt(asSInt(UInt<32>("hf4292244"))) @[defs.scala 25:67]
    node A_K_49 = asUInt(asSInt(UInt<32>("h432aff97"))) @[defs.scala 25:67]
    node A_K_50 = asUInt(asSInt(UInt<32>("hab9423a7"))) @[defs.scala 25:67]
    node A_K_51 = asUInt(asSInt(UInt<32>("hfc93a039"))) @[defs.scala 25:67]
    node A_K_52 = asUInt(asSInt(UInt<32>("h655b59c3"))) @[defs.scala 25:67]
    node A_K_53 = asUInt(asSInt(UInt<32>("h8f0ccc92"))) @[defs.scala 25:67]
    node A_K_54 = asUInt(asSInt(UInt<32>("hffeff47d"))) @[defs.scala 25:67]
    node A_K_55 = asUInt(asSInt(UInt<32>("h85845dd1"))) @[defs.scala 25:67]
    node A_K_56 = asUInt(asSInt(UInt<32>("h6fa87e4f"))) @[defs.scala 25:67]
    node A_K_57 = asUInt(asSInt(UInt<32>("hfe2ce6e0"))) @[defs.scala 25:67]
    node A_K_58 = asUInt(asSInt(UInt<32>("ha3014314"))) @[defs.scala 25:67]
    node A_K_59 = asUInt(asSInt(UInt<32>("h4e0811a1"))) @[defs.scala 25:67]
    node A_K_60 = asUInt(asSInt(UInt<32>("hf7537e82"))) @[defs.scala 25:67]
    node A_K_61 = asUInt(asSInt(UInt<32>("hbd3af235"))) @[defs.scala 25:67]
    node A_K_62 = asUInt(asSInt(UInt<32>("h2ad7d2bb"))) @[defs.scala 25:67]
    node A_K_63 = asUInt(asSInt(UInt<32>("heb86d391"))) @[defs.scala 25:67]
    node A_A = asUInt(asSInt(UInt<32>("h67452301"))) @[defs.scala 26:30]
    node A_B = asUInt(asSInt(UInt<32>("hefcdab89"))) @[defs.scala 27:30]
    node A_C = asUInt(asSInt(UInt<32>("h98badcfe"))) @[defs.scala 28:30]
    node A_D = asUInt(asSInt(UInt<32>("h10325476"))) @[defs.scala 29:30]
    reg A : UInt<32>, clock with :
      reset => (UInt<1>("h0"), A) @[md5.scala 19:18]
    reg B : UInt<32>, clock with :
      reset => (UInt<1>("h0"), B) @[md5.scala 20:18]
    reg C : UInt<32>, clock with :
      reset => (UInt<1>("h0"), C) @[md5.scala 21:18]
    reg D : UInt<32>, clock with :
      reset => (UInt<1>("h0"), D) @[md5.scala 22:18]
    reg AA : UInt<32>, clock with :
      reset => (UInt<1>("h0"), AA) @[md5.scala 23:19]
    reg BB : UInt<32>, clock with :
      reset => (UInt<1>("h0"), BB) @[md5.scala 24:19]
    reg CC : UInt<32>, clock with :
      reset => (UInt<1>("h0"), CC) @[md5.scala 25:19]
    reg DD : UInt<32>, clock with :
      reset => (UInt<1>("h0"), DD) @[md5.scala 26:19]
    reg phase : UInt<4>, clock with :
      reset => (UInt<1>("h0"), phase) @[md5.scala 31:22]
    reg state : UInt<8>, clock with :
      reset => (UInt<1>("h0"), state) @[md5.scala 32:22]
    reg msg : UInt<512>, clock with :
      reset => (UInt<1>("h0"), msg) @[md5.scala 34:20]
    reg out_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), out_r) @[md5.scala 35:22]
    node _out_r_T = dshr(state, UInt<3>("h5")) @[md5.scala 53:17]
    node _out_r_T_1 = bits(_out_r_T, 0, 0) @[md5.scala 53:17]
    node _io_ready_T = dshr(state, UInt<3>("h0")) @[md5.scala 55:20]
    node _io_ready_T_1 = bits(_io_ready_T, 0, 0) @[md5.scala 55:20]
    node _io_out_T = cat(A, B) @[md5.scala 56:15]
    node _io_out_T_1 = cat(_io_out_T, C) @[md5.scala 56:20]
    node _io_out_T_2 = cat(_io_out_T_1, D) @[md5.scala 56:25]
    node _T_121 = dshr(state, UInt<3>("h6")) @[md5.scala 229:13]
    node _T_122 = bits(_T_121, 0, 0) @[md5.scala 229:13]
    node _next_state_T_6 = dshl(UInt<1>("h1"), UInt<3>("h0")) @[OneHot.scala 57:35]
    node _T_119 = dshr(state, UInt<3>("h5")) @[md5.scala 219:13]
    node _T_120 = bits(_T_119, 0, 0) @[md5.scala 219:13]
    node _next_state_T_5 = dshl(UInt<1>("h1"), UInt<3>("h6")) @[OneHot.scala 57:35]
    node _T_24 = dshr(state, UInt<3>("h1")) @[md5.scala 120:13]
    node _T_25 = bits(_T_24, 0, 0) @[md5.scala 120:13]
    node _T_26 = dshr(state, UInt<3>("h2")) @[md5.scala 120:26]
    node _T_27 = bits(_T_26, 0, 0) @[md5.scala 120:26]
    node _T_28 = or(_T_25, _T_27) @[md5.scala 120:18]
    node _T_29 = dshr(state, UInt<3>("h3")) @[md5.scala 120:39]
    node _T_30 = bits(_T_29, 0, 0) @[md5.scala 120:39]
    node _T_31 = or(_T_28, _T_30) @[md5.scala 120:31]
    node _T_32 = dshr(state, UInt<3>("h4")) @[md5.scala 120:52]
    node _T_33 = bits(_T_32, 0, 0) @[md5.scala 120:52]
    node _T_34 = or(_T_31, _T_33) @[md5.scala 120:44]
    node _T_35 = dshr(state, UInt<3>("h1")) @[md5.scala 122:15]
    node _T_36 = bits(_T_35, 0, 0) @[md5.scala 122:15]
    node _T_37 = eq(phase, UInt<4>("hf")) @[md5.scala 126:18]
    node _next_state_T_1 = dshl(UInt<1>("h1"), UInt<3>("h2")) @[OneHot.scala 57:35]
    node _T_21 = dshr(state, UInt<3>("h0")) @[md5.scala 115:13]
    node _T_22 = bits(_T_21, 0, 0) @[md5.scala 115:13]
    node _T_23 = and(_T_22, io_in_valid) @[md5.scala 115:20]
    node _next_state_T = dshl(UInt<1>("h1"), UInt<3>("h1")) @[OneHot.scala 57:35]
    node _GEN_15 = mux(_T_23, _next_state_T, state) @[md5.scala 115:36 116:16 51:14]
    node _GEN_16 = mux(_T_37, _next_state_T_1, _GEN_15) @[md5.scala 126:28 127:20]
    node _T_54 = dshr(state, UInt<3>("h2")) @[md5.scala 138:21]
    node _T_55 = bits(_T_54, 0, 0) @[md5.scala 138:21]
    node _T_56 = eq(phase, UInt<4>("hf")) @[md5.scala 142:18]
    node _next_state_T_2 = dshl(UInt<1>("h1"), UInt<3>("h3")) @[OneHot.scala 57:35]
    node _GEN_65 = mux(_T_56, _next_state_T_2, _GEN_15) @[md5.scala 142:28 143:20]
    node _T_73 = dshr(state, UInt<3>("h3")) @[md5.scala 154:21]
    node _T_74 = bits(_T_73, 0, 0) @[md5.scala 154:21]
    node _T_75 = eq(phase, UInt<4>("hf")) @[md5.scala 158:18]
    node _next_state_T_3 = dshl(UInt<1>("h1"), UInt<3>("h4")) @[OneHot.scala 57:35]
    node _GEN_114 = mux(_T_75, _next_state_T_3, _GEN_15) @[md5.scala 158:28 159:20]
    node _T_92 = dshr(state, UInt<3>("h4")) @[md5.scala 170:21]
    node _T_93 = bits(_T_92, 0, 0) @[md5.scala 170:21]
    node _T_94 = eq(phase, UInt<4>("hf")) @[md5.scala 174:18]
    node _next_state_T_4 = dshl(UInt<1>("h1"), UInt<3>("h5")) @[OneHot.scala 57:35]
    node _GEN_163 = mux(_T_94, _next_state_T_4, _GEN_15) @[md5.scala 174:28 175:20]
    node _GEN_213 = mux(_T_93, _GEN_163, _GEN_15) @[md5.scala 170:27]
    node _GEN_218 = mux(_T_74, _GEN_114, _GEN_213) @[md5.scala 154:27]
    node _GEN_223 = mux(_T_55, _GEN_65, _GEN_218) @[md5.scala 138:27]
    node _GEN_228 = mux(_T_36, _GEN_16, _GEN_223) @[md5.scala 122:21]
    node _GEN_259 = mux(_T_34, _GEN_228, _GEN_15) @[md5.scala 120:58]
    node _GEN_279 = mux(_T_120, _next_state_T_5, _GEN_259) @[md5.scala 219:25 226:16]
    node _GEN_280 = mux(_T_122, _next_state_T_6, _GEN_279) @[md5.scala 229:26 231:16]
    node next_state = _GEN_280 @[md5.scala 33:24]
    node _T = dshr(next_state, UInt<3>("h0")) @[md5.scala 75:18]
    node _T_1 = bits(_T, 0, 0) @[md5.scala 75:18]
    node _T_2 = dshr(next_state, UInt<3>("h1")) @[md5.scala 80:24]
    node _T_3 = bits(_T_2, 0, 0) @[md5.scala 80:24]
    node _T_4 = dshr(state, UInt<3>("h0")) @[md5.scala 80:37]
    node _T_5 = bits(_T_4, 0, 0) @[md5.scala 80:37]
    node _T_6 = and(_T_3, _T_5) @[md5.scala 80:29]
    node _GEN_0 = mux(_T_6, A, AA) @[md5.scala 23:19 80:45 81:8]
    node _GEN_1 = mux(_T_6, B, BB) @[md5.scala 24:19 80:45 82:8]
    node _GEN_2 = mux(_T_6, C, CC) @[md5.scala 25:19 80:45 83:8]
    node _GEN_3 = mux(_T_6, D, DD) @[md5.scala 26:19 80:45 84:8]
    node _GEN_4 = mux(_T_1, UInt<1>("h0"), _GEN_0) @[md5.scala 75:26 76:8]
    node _GEN_5 = mux(_T_1, UInt<1>("h0"), _GEN_1) @[md5.scala 75:26 77:8]
    node _GEN_6 = mux(_T_1, UInt<1>("h0"), _GEN_2) @[md5.scala 75:26 78:8]
    node _GEN_7 = mux(_T_1, UInt<1>("h0"), _GEN_3) @[md5.scala 75:26 79:8]
    node _T_7 = dshr(next_state, UInt<3>("h0")) @[md5.scala 88:18]
    node _T_8 = bits(_T_7, 0, 0) @[md5.scala 88:18]
    node _next_A_T = add(AA, A) @[md5.scala 222:18]
    node _next_A_T_1 = tail(_next_A_T, 1) @[md5.scala 222:18]
    node _T_111 = and(phase, UInt<2>("h3")) @[md5.scala 187:17]
    node _T_112 = eq(_T_111, UInt<1>("h0")) @[md5.scala 187:24]
    node _GEN_250 = mux(_T_112, r.io_next_a, A) @[md5.scala 187:33 188:14 47:10]
    node _GEN_263 = mux(_T_34, _GEN_250, A) @[md5.scala 120:58 47:10]
    node _GEN_275 = mux(_T_120, _next_A_T_1, _GEN_263) @[md5.scala 219:25 222:12]
    node next_A = _GEN_275 @[md5.scala 27:20]
    node _GEN_8 = mux(_T_8, A_A, next_A) @[md5.scala 88:26 89:7 94:7]
    node _next_B_T = add(BB, B) @[md5.scala 223:18]
    node _next_B_T_1 = tail(_next_B_T, 1) @[md5.scala 223:18]
    node _T_113 = and(phase, UInt<2>("h3")) @[md5.scala 193:23]
    node _T_114 = eq(_T_113, UInt<1>("h1")) @[md5.scala 193:30]
    node _T_115 = and(phase, UInt<2>("h3")) @[md5.scala 199:23]
    node _T_116 = eq(_T_115, UInt<2>("h2")) @[md5.scala 199:30]
    node _T_117 = and(phase, UInt<2>("h3")) @[md5.scala 205:23]
    node _T_118 = eq(_T_117, UInt<2>("h3")) @[md5.scala 205:30]
    node _GEN_232 = mux(_T_118, r.io_next_a, B) @[md5.scala 205:39 206:14 48:10]
    node _GEN_242 = mux(_T_116, B, _GEN_232) @[md5.scala 199:39 48:10]
    node _GEN_249 = mux(_T_114, B, _GEN_242) @[md5.scala 193:39 48:10]
    node _GEN_257 = mux(_T_112, B, _GEN_249) @[md5.scala 187:33 48:10]
    node _GEN_270 = mux(_T_34, _GEN_257, B) @[md5.scala 120:58 48:10]
    node _GEN_276 = mux(_T_120, _next_B_T_1, _GEN_270) @[md5.scala 219:25 223:12]
    node next_B = _GEN_276 @[md5.scala 28:20]
    node _GEN_9 = mux(_T_8, A_B, next_B) @[md5.scala 88:26 90:7 95:7]
    node _next_C_T = add(CC, C) @[md5.scala 224:18]
    node _next_C_T_1 = tail(_next_C_T, 1) @[md5.scala 224:18]
    node _GEN_237 = mux(_T_116, r.io_next_a, C) @[md5.scala 199:39 200:14 49:10]
    node _GEN_248 = mux(_T_114, C, _GEN_237) @[md5.scala 193:39 49:10]
    node _GEN_256 = mux(_T_112, C, _GEN_248) @[md5.scala 187:33 49:10]
    node _GEN_269 = mux(_T_34, _GEN_256, C) @[md5.scala 120:58 49:10]
    node _GEN_277 = mux(_T_120, _next_C_T_1, _GEN_269) @[md5.scala 219:25 224:12]
    node next_C = _GEN_277 @[md5.scala 29:20]
    node _GEN_10 = mux(_T_8, A_C, next_C) @[md5.scala 88:26 91:7 96:7]
    node _next_D_T = add(DD, D) @[md5.scala 225:18]
    node _next_D_T_1 = tail(_next_D_T, 1) @[md5.scala 225:18]
    node _GEN_243 = mux(_T_114, r.io_next_a, D) @[md5.scala 193:39 194:14 50:10]
    node _GEN_255 = mux(_T_112, D, _GEN_243) @[md5.scala 187:33 50:10]
    node _GEN_268 = mux(_T_34, _GEN_255, D) @[md5.scala 120:58 50:10]
    node _GEN_278 = mux(_T_120, _next_D_T_1, _GEN_268) @[md5.scala 219:25 225:12]
    node next_D = _GEN_278 @[md5.scala 30:20]
    node _GEN_11 = mux(_T_8, A_D, next_D) @[md5.scala 88:26 92:7 97:7]
    node _T_9 = dshr(next_state, UInt<3>("h1")) @[md5.scala 101:18]
    node _T_10 = bits(_T_9, 0, 0) @[md5.scala 101:18]
    node _T_11 = dshr(state, UInt<3>("h0")) @[md5.scala 101:31]
    node _T_12 = bits(_T_11, 0, 0) @[md5.scala 101:31]
    node _T_13 = and(_T_10, _T_12) @[md5.scala 101:23]
    node _phase_T = add(phase, UInt<1>("h1")) @[md5.scala 104:20]
    node _phase_T_1 = tail(_phase_T, 1) @[md5.scala 104:20]
    node _GEN_12 = mux(_T_13, UInt<1>("h0"), _phase_T_1) @[md5.scala 101:39 102:11 104:11]
    node _T_14 = dshr(next_state, UInt<3>("h0")) @[md5.scala 107:18]
    node _T_15 = bits(_T_14, 0, 0) @[md5.scala 107:18]
    node _T_16 = dshr(next_state, UInt<3>("h1")) @[md5.scala 109:24]
    node _T_17 = bits(_T_16, 0, 0) @[md5.scala 109:24]
    node _T_18 = dshr(state, UInt<3>("h0")) @[md5.scala 109:37]
    node _T_19 = bits(_T_18, 0, 0) @[md5.scala 109:37]
    node _T_20 = and(_T_17, _T_19) @[md5.scala 109:29]
    node msg_lo = cat(io_in, io_in) @[Cat.scala 31:58]
    node msg_hi = cat(io_in, io_in) @[Cat.scala 31:58]
    node _msg_T = cat(msg_hi, msg_lo) @[Cat.scala 31:58]
    node _GEN_13 = mux(_T_20, _msg_T, msg) @[md5.scala 109:45 110:9 34:20]
    node _GEN_14 = mux(_T_15, UInt<1>("h0"), _GEN_13) @[md5.scala 107:26 108:9]
    node _T_38 = eq(phase, UInt<1>("h0")) @[md5.scala 131:20]
    node _r_io_m_T = bits(msg, 31, 0) @[md5.scala 133:24]
    node _GEN_17 = mux(_T_38, _r_io_m_T, UInt<1>("h0")) @[md5.scala 131:29 133:18 67:10]
    node _GEN_18 = mux(_T_38, UInt<5>("h7"), UInt<1>("h0")) @[md5.scala 131:29 134:18 68:10]
    node _GEN_19 = mux(_T_38, A_K_0, UInt<1>("h0")) @[md5.scala 131:29 135:18 69:10]
    node _T_39 = eq(phase, UInt<1>("h1")) @[md5.scala 131:20]
    node _r_io_m_T_1 = bits(msg, 63, 32) @[md5.scala 133:24]
    node _GEN_20 = mux(_T_39, _r_io_m_T_1, _GEN_17) @[md5.scala 131:29 133:18]
    node _GEN_21 = mux(_T_39, UInt<5>("hc"), _GEN_18) @[md5.scala 131:29 134:18]
    node _GEN_22 = mux(_T_39, A_K_1, _GEN_19) @[md5.scala 131:29 135:18]
    node _T_40 = eq(phase, UInt<2>("h2")) @[md5.scala 131:20]
    node _r_io_m_T_2 = bits(msg, 95, 64) @[md5.scala 133:24]
    node _GEN_23 = mux(_T_40, _r_io_m_T_2, _GEN_20) @[md5.scala 131:29 133:18]
    node _GEN_24 = mux(_T_40, UInt<5>("h11"), _GEN_21) @[md5.scala 131:29 134:18]
    node _GEN_25 = mux(_T_40, A_K_2, _GEN_22) @[md5.scala 131:29 135:18]
    node _T_41 = eq(phase, UInt<2>("h3")) @[md5.scala 131:20]
    node _r_io_m_T_3 = bits(msg, 127, 96) @[md5.scala 133:24]
    node _GEN_26 = mux(_T_41, _r_io_m_T_3, _GEN_23) @[md5.scala 131:29 133:18]
    node _GEN_27 = mux(_T_41, UInt<5>("h16"), _GEN_24) @[md5.scala 131:29 134:18]
    node _GEN_28 = mux(_T_41, A_K_3, _GEN_25) @[md5.scala 131:29 135:18]
    node _T_42 = eq(phase, UInt<3>("h4")) @[md5.scala 131:20]
    node _r_io_m_T_4 = bits(msg, 159, 128) @[md5.scala 133:24]
    node _GEN_29 = mux(_T_42, _r_io_m_T_4, _GEN_26) @[md5.scala 131:29 133:18]
    node _GEN_30 = mux(_T_42, UInt<5>("h7"), _GEN_27) @[md5.scala 131:29 134:18]
    node _GEN_31 = mux(_T_42, A_K_4, _GEN_28) @[md5.scala 131:29 135:18]
    node _T_43 = eq(phase, UInt<3>("h5")) @[md5.scala 131:20]
    node _r_io_m_T_5 = bits(msg, 191, 160) @[md5.scala 133:24]
    node _GEN_32 = mux(_T_43, _r_io_m_T_5, _GEN_29) @[md5.scala 131:29 133:18]
    node _GEN_33 = mux(_T_43, UInt<5>("hc"), _GEN_30) @[md5.scala 131:29 134:18]
    node _GEN_34 = mux(_T_43, A_K_5, _GEN_31) @[md5.scala 131:29 135:18]
    node _T_44 = eq(phase, UInt<3>("h6")) @[md5.scala 131:20]
    node _r_io_m_T_6 = bits(msg, 223, 192) @[md5.scala 133:24]
    node _GEN_35 = mux(_T_44, _r_io_m_T_6, _GEN_32) @[md5.scala 131:29 133:18]
    node _GEN_36 = mux(_T_44, UInt<5>("h11"), _GEN_33) @[md5.scala 131:29 134:18]
    node _GEN_37 = mux(_T_44, A_K_6, _GEN_34) @[md5.scala 131:29 135:18]
    node _T_45 = eq(phase, UInt<3>("h7")) @[md5.scala 131:20]
    node _r_io_m_T_7 = bits(msg, 255, 224) @[md5.scala 133:24]
    node _GEN_38 = mux(_T_45, _r_io_m_T_7, _GEN_35) @[md5.scala 131:29 133:18]
    node _GEN_39 = mux(_T_45, UInt<5>("h16"), _GEN_36) @[md5.scala 131:29 134:18]
    node _GEN_40 = mux(_T_45, A_K_7, _GEN_37) @[md5.scala 131:29 135:18]
    node _T_46 = eq(phase, UInt<4>("h8")) @[md5.scala 131:20]
    node _r_io_m_T_8 = bits(msg, 287, 256) @[md5.scala 133:24]
    node _GEN_41 = mux(_T_46, _r_io_m_T_8, _GEN_38) @[md5.scala 131:29 133:18]
    node _GEN_42 = mux(_T_46, UInt<5>("h7"), _GEN_39) @[md5.scala 131:29 134:18]
    node _GEN_43 = mux(_T_46, A_K_8, _GEN_40) @[md5.scala 131:29 135:18]
    node _T_47 = eq(phase, UInt<4>("h9")) @[md5.scala 131:20]
    node _r_io_m_T_9 = bits(msg, 319, 288) @[md5.scala 133:24]
    node _GEN_44 = mux(_T_47, _r_io_m_T_9, _GEN_41) @[md5.scala 131:29 133:18]
    node _GEN_45 = mux(_T_47, UInt<5>("hc"), _GEN_42) @[md5.scala 131:29 134:18]
    node _GEN_46 = mux(_T_47, A_K_9, _GEN_43) @[md5.scala 131:29 135:18]
    node _T_48 = eq(phase, UInt<4>("ha")) @[md5.scala 131:20]
    node _r_io_m_T_10 = bits(msg, 351, 320) @[md5.scala 133:24]
    node _GEN_47 = mux(_T_48, _r_io_m_T_10, _GEN_44) @[md5.scala 131:29 133:18]
    node _GEN_48 = mux(_T_48, UInt<5>("h11"), _GEN_45) @[md5.scala 131:29 134:18]
    node _GEN_49 = mux(_T_48, A_K_10, _GEN_46) @[md5.scala 131:29 135:18]
    node _T_49 = eq(phase, UInt<4>("hb")) @[md5.scala 131:20]
    node _r_io_m_T_11 = bits(msg, 383, 352) @[md5.scala 133:24]
    node _GEN_50 = mux(_T_49, _r_io_m_T_11, _GEN_47) @[md5.scala 131:29 133:18]
    node _GEN_51 = mux(_T_49, UInt<5>("h16"), _GEN_48) @[md5.scala 131:29 134:18]
    node _GEN_52 = mux(_T_49, A_K_11, _GEN_49) @[md5.scala 131:29 135:18]
    node _T_50 = eq(phase, UInt<4>("hc")) @[md5.scala 131:20]
    node _r_io_m_T_12 = bits(msg, 415, 384) @[md5.scala 133:24]
    node _GEN_53 = mux(_T_50, _r_io_m_T_12, _GEN_50) @[md5.scala 131:29 133:18]
    node _GEN_54 = mux(_T_50, UInt<5>("h7"), _GEN_51) @[md5.scala 131:29 134:18]
    node _GEN_55 = mux(_T_50, A_K_12, _GEN_52) @[md5.scala 131:29 135:18]
    node _T_51 = eq(phase, UInt<4>("hd")) @[md5.scala 131:20]
    node _r_io_m_T_13 = bits(msg, 447, 416) @[md5.scala 133:24]
    node _GEN_56 = mux(_T_51, _r_io_m_T_13, _GEN_53) @[md5.scala 131:29 133:18]
    node _GEN_57 = mux(_T_51, UInt<5>("hc"), _GEN_54) @[md5.scala 131:29 134:18]
    node _GEN_58 = mux(_T_51, A_K_13, _GEN_55) @[md5.scala 131:29 135:18]
    node _T_52 = eq(phase, UInt<4>("he")) @[md5.scala 131:20]
    node _r_io_m_T_14 = bits(msg, 479, 448) @[md5.scala 133:24]
    node _GEN_59 = mux(_T_52, _r_io_m_T_14, _GEN_56) @[md5.scala 131:29 133:18]
    node _GEN_60 = mux(_T_52, UInt<5>("h11"), _GEN_57) @[md5.scala 131:29 134:18]
    node _GEN_61 = mux(_T_52, A_K_14, _GEN_58) @[md5.scala 131:29 135:18]
    node _T_53 = eq(phase, UInt<4>("hf")) @[md5.scala 131:20]
    node _r_io_m_T_15 = bits(msg, 511, 480) @[md5.scala 133:24]
    node _GEN_62 = mux(_T_53, _r_io_m_T_15, _GEN_59) @[md5.scala 131:29 133:18]
    node _GEN_63 = mux(_T_53, UInt<5>("h16"), _GEN_60) @[md5.scala 131:29 134:18]
    node _GEN_64 = mux(_T_53, A_K_15, _GEN_61) @[md5.scala 131:29 135:18]
    node _T_57 = eq(phase, UInt<1>("h0")) @[md5.scala 147:20]
    node _r_io_m_T_16 = bits(msg, 31, 0) @[md5.scala 149:24]
    node _GEN_66 = mux(_T_57, _r_io_m_T_16, UInt<1>("h0")) @[md5.scala 147:29 149:18 67:10]
    node _GEN_67 = mux(_T_57, UInt<5>("h5"), UInt<1>("h0")) @[md5.scala 147:29 150:18 68:10]
    node _GEN_68 = mux(_T_57, A_K_16, UInt<1>("h0")) @[md5.scala 147:29 151:18 69:10]
    node _T_58 = eq(phase, UInt<1>("h1")) @[md5.scala 147:20]
    node _r_io_m_T_17 = bits(msg, 287, 256) @[md5.scala 149:24]
    node _GEN_69 = mux(_T_58, _r_io_m_T_17, _GEN_66) @[md5.scala 147:29 149:18]
    node _GEN_70 = mux(_T_58, UInt<5>("h9"), _GEN_67) @[md5.scala 147:29 150:18]
    node _GEN_71 = mux(_T_58, A_K_17, _GEN_68) @[md5.scala 147:29 151:18]
    node _T_59 = eq(phase, UInt<2>("h2")) @[md5.scala 147:20]
    node _r_io_m_T_18 = bits(msg, 63, 32) @[md5.scala 149:24]
    node _GEN_72 = mux(_T_59, _r_io_m_T_18, _GEN_69) @[md5.scala 147:29 149:18]
    node _GEN_73 = mux(_T_59, UInt<5>("he"), _GEN_70) @[md5.scala 147:29 150:18]
    node _GEN_74 = mux(_T_59, A_K_18, _GEN_71) @[md5.scala 147:29 151:18]
    node _T_60 = eq(phase, UInt<2>("h3")) @[md5.scala 147:20]
    node _r_io_m_T_19 = bits(msg, 319, 288) @[md5.scala 149:24]
    node _GEN_75 = mux(_T_60, _r_io_m_T_19, _GEN_72) @[md5.scala 147:29 149:18]
    node _GEN_76 = mux(_T_60, UInt<5>("h14"), _GEN_73) @[md5.scala 147:29 150:18]
    node _GEN_77 = mux(_T_60, A_K_19, _GEN_74) @[md5.scala 147:29 151:18]
    node _T_61 = eq(phase, UInt<3>("h4")) @[md5.scala 147:20]
    node _r_io_m_T_20 = bits(msg, 95, 64) @[md5.scala 149:24]
    node _GEN_78 = mux(_T_61, _r_io_m_T_20, _GEN_75) @[md5.scala 147:29 149:18]
    node _GEN_79 = mux(_T_61, UInt<5>("h5"), _GEN_76) @[md5.scala 147:29 150:18]
    node _GEN_80 = mux(_T_61, A_K_20, _GEN_77) @[md5.scala 147:29 151:18]
    node _T_62 = eq(phase, UInt<3>("h5")) @[md5.scala 147:20]
    node _r_io_m_T_21 = bits(msg, 351, 320) @[md5.scala 149:24]
    node _GEN_81 = mux(_T_62, _r_io_m_T_21, _GEN_78) @[md5.scala 147:29 149:18]
    node _GEN_82 = mux(_T_62, UInt<5>("h9"), _GEN_79) @[md5.scala 147:29 150:18]
    node _GEN_83 = mux(_T_62, A_K_21, _GEN_80) @[md5.scala 147:29 151:18]
    node _T_63 = eq(phase, UInt<3>("h6")) @[md5.scala 147:20]
    node _r_io_m_T_22 = bits(msg, 127, 96) @[md5.scala 149:24]
    node _GEN_84 = mux(_T_63, _r_io_m_T_22, _GEN_81) @[md5.scala 147:29 149:18]
    node _GEN_85 = mux(_T_63, UInt<5>("he"), _GEN_82) @[md5.scala 147:29 150:18]
    node _GEN_86 = mux(_T_63, A_K_22, _GEN_83) @[md5.scala 147:29 151:18]
    node _T_64 = eq(phase, UInt<3>("h7")) @[md5.scala 147:20]
    node _r_io_m_T_23 = bits(msg, 383, 352) @[md5.scala 149:24]
    node _GEN_87 = mux(_T_64, _r_io_m_T_23, _GEN_84) @[md5.scala 147:29 149:18]
    node _GEN_88 = mux(_T_64, UInt<5>("h14"), _GEN_85) @[md5.scala 147:29 150:18]
    node _GEN_89 = mux(_T_64, A_K_23, _GEN_86) @[md5.scala 147:29 151:18]
    node _T_65 = eq(phase, UInt<4>("h8")) @[md5.scala 147:20]
    node _r_io_m_T_24 = bits(msg, 159, 128) @[md5.scala 149:24]
    node _GEN_90 = mux(_T_65, _r_io_m_T_24, _GEN_87) @[md5.scala 147:29 149:18]
    node _GEN_91 = mux(_T_65, UInt<5>("h5"), _GEN_88) @[md5.scala 147:29 150:18]
    node _GEN_92 = mux(_T_65, A_K_24, _GEN_89) @[md5.scala 147:29 151:18]
    node _T_66 = eq(phase, UInt<4>("h9")) @[md5.scala 147:20]
    node _r_io_m_T_25 = bits(msg, 415, 384) @[md5.scala 149:24]
    node _GEN_93 = mux(_T_66, _r_io_m_T_25, _GEN_90) @[md5.scala 147:29 149:18]
    node _GEN_94 = mux(_T_66, UInt<5>("h9"), _GEN_91) @[md5.scala 147:29 150:18]
    node _GEN_95 = mux(_T_66, A_K_25, _GEN_92) @[md5.scala 147:29 151:18]
    node _T_67 = eq(phase, UInt<4>("ha")) @[md5.scala 147:20]
    node _r_io_m_T_26 = bits(msg, 191, 160) @[md5.scala 149:24]
    node _GEN_96 = mux(_T_67, _r_io_m_T_26, _GEN_93) @[md5.scala 147:29 149:18]
    node _GEN_97 = mux(_T_67, UInt<5>("he"), _GEN_94) @[md5.scala 147:29 150:18]
    node _GEN_98 = mux(_T_67, A_K_26, _GEN_95) @[md5.scala 147:29 151:18]
    node _T_68 = eq(phase, UInt<4>("hb")) @[md5.scala 147:20]
    node _r_io_m_T_27 = bits(msg, 447, 416) @[md5.scala 149:24]
    node _GEN_99 = mux(_T_68, _r_io_m_T_27, _GEN_96) @[md5.scala 147:29 149:18]
    node _GEN_100 = mux(_T_68, UInt<5>("h14"), _GEN_97) @[md5.scala 147:29 150:18]
    node _GEN_101 = mux(_T_68, A_K_27, _GEN_98) @[md5.scala 147:29 151:18]
    node _T_69 = eq(phase, UInt<4>("hc")) @[md5.scala 147:20]
    node _r_io_m_T_28 = bits(msg, 223, 192) @[md5.scala 149:24]
    node _GEN_102 = mux(_T_69, _r_io_m_T_28, _GEN_99) @[md5.scala 147:29 149:18]
    node _GEN_103 = mux(_T_69, UInt<5>("h5"), _GEN_100) @[md5.scala 147:29 150:18]
    node _GEN_104 = mux(_T_69, A_K_28, _GEN_101) @[md5.scala 147:29 151:18]
    node _T_70 = eq(phase, UInt<4>("hd")) @[md5.scala 147:20]
    node _r_io_m_T_29 = bits(msg, 479, 448) @[md5.scala 149:24]
    node _GEN_105 = mux(_T_70, _r_io_m_T_29, _GEN_102) @[md5.scala 147:29 149:18]
    node _GEN_106 = mux(_T_70, UInt<5>("h9"), _GEN_103) @[md5.scala 147:29 150:18]
    node _GEN_107 = mux(_T_70, A_K_29, _GEN_104) @[md5.scala 147:29 151:18]
    node _T_71 = eq(phase, UInt<4>("he")) @[md5.scala 147:20]
    node _r_io_m_T_30 = bits(msg, 255, 224) @[md5.scala 149:24]
    node _GEN_108 = mux(_T_71, _r_io_m_T_30, _GEN_105) @[md5.scala 147:29 149:18]
    node _GEN_109 = mux(_T_71, UInt<5>("he"), _GEN_106) @[md5.scala 147:29 150:18]
    node _GEN_110 = mux(_T_71, A_K_30, _GEN_107) @[md5.scala 147:29 151:18]
    node _T_72 = eq(phase, UInt<4>("hf")) @[md5.scala 147:20]
    node _r_io_m_T_31 = bits(msg, 511, 480) @[md5.scala 149:24]
    node _GEN_111 = mux(_T_72, _r_io_m_T_31, _GEN_108) @[md5.scala 147:29 149:18]
    node _GEN_112 = mux(_T_72, UInt<5>("h14"), _GEN_109) @[md5.scala 147:29 150:18]
    node _GEN_113 = mux(_T_72, A_K_31, _GEN_110) @[md5.scala 147:29 151:18]
    node _T_76 = eq(phase, UInt<1>("h0")) @[md5.scala 163:20]
    node _r_io_m_T_32 = bits(msg, 31, 0) @[md5.scala 165:24]
    node _GEN_115 = mux(_T_76, _r_io_m_T_32, UInt<1>("h0")) @[md5.scala 163:29 165:18 67:10]
    node _GEN_116 = mux(_T_76, UInt<5>("h4"), UInt<1>("h0")) @[md5.scala 163:29 166:18 68:10]
    node _GEN_117 = mux(_T_76, A_K_32, UInt<1>("h0")) @[md5.scala 163:29 167:18 69:10]
    node _T_77 = eq(phase, UInt<1>("h1")) @[md5.scala 163:20]
    node _r_io_m_T_33 = bits(msg, 159, 128) @[md5.scala 165:24]
    node _GEN_118 = mux(_T_77, _r_io_m_T_33, _GEN_115) @[md5.scala 163:29 165:18]
    node _GEN_119 = mux(_T_77, UInt<5>("hb"), _GEN_116) @[md5.scala 163:29 166:18]
    node _GEN_120 = mux(_T_77, A_K_33, _GEN_117) @[md5.scala 163:29 167:18]
    node _T_78 = eq(phase, UInt<2>("h2")) @[md5.scala 163:20]
    node _r_io_m_T_34 = bits(msg, 287, 256) @[md5.scala 165:24]
    node _GEN_121 = mux(_T_78, _r_io_m_T_34, _GEN_118) @[md5.scala 163:29 165:18]
    node _GEN_122 = mux(_T_78, UInt<5>("h10"), _GEN_119) @[md5.scala 163:29 166:18]
    node _GEN_123 = mux(_T_78, A_K_34, _GEN_120) @[md5.scala 163:29 167:18]
    node _T_79 = eq(phase, UInt<2>("h3")) @[md5.scala 163:20]
    node _r_io_m_T_35 = bits(msg, 415, 384) @[md5.scala 165:24]
    node _GEN_124 = mux(_T_79, _r_io_m_T_35, _GEN_121) @[md5.scala 163:29 165:18]
    node _GEN_125 = mux(_T_79, UInt<5>("h17"), _GEN_122) @[md5.scala 163:29 166:18]
    node _GEN_126 = mux(_T_79, A_K_35, _GEN_123) @[md5.scala 163:29 167:18]
    node _T_80 = eq(phase, UInt<3>("h4")) @[md5.scala 163:20]
    node _r_io_m_T_36 = bits(msg, 63, 32) @[md5.scala 165:24]
    node _GEN_127 = mux(_T_80, _r_io_m_T_36, _GEN_124) @[md5.scala 163:29 165:18]
    node _GEN_128 = mux(_T_80, UInt<5>("h4"), _GEN_125) @[md5.scala 163:29 166:18]
    node _GEN_129 = mux(_T_80, A_K_36, _GEN_126) @[md5.scala 163:29 167:18]
    node _T_81 = eq(phase, UInt<3>("h5")) @[md5.scala 163:20]
    node _r_io_m_T_37 = bits(msg, 191, 160) @[md5.scala 165:24]
    node _GEN_130 = mux(_T_81, _r_io_m_T_37, _GEN_127) @[md5.scala 163:29 165:18]
    node _GEN_131 = mux(_T_81, UInt<5>("hb"), _GEN_128) @[md5.scala 163:29 166:18]
    node _GEN_132 = mux(_T_81, A_K_37, _GEN_129) @[md5.scala 163:29 167:18]
    node _T_82 = eq(phase, UInt<3>("h6")) @[md5.scala 163:20]
    node _r_io_m_T_38 = bits(msg, 319, 288) @[md5.scala 165:24]
    node _GEN_133 = mux(_T_82, _r_io_m_T_38, _GEN_130) @[md5.scala 163:29 165:18]
    node _GEN_134 = mux(_T_82, UInt<5>("h10"), _GEN_131) @[md5.scala 163:29 166:18]
    node _GEN_135 = mux(_T_82, A_K_38, _GEN_132) @[md5.scala 163:29 167:18]
    node _T_83 = eq(phase, UInt<3>("h7")) @[md5.scala 163:20]
    node _r_io_m_T_39 = bits(msg, 447, 416) @[md5.scala 165:24]
    node _GEN_136 = mux(_T_83, _r_io_m_T_39, _GEN_133) @[md5.scala 163:29 165:18]
    node _GEN_137 = mux(_T_83, UInt<5>("h17"), _GEN_134) @[md5.scala 163:29 166:18]
    node _GEN_138 = mux(_T_83, A_K_39, _GEN_135) @[md5.scala 163:29 167:18]
    node _T_84 = eq(phase, UInt<4>("h8")) @[md5.scala 163:20]
    node _r_io_m_T_40 = bits(msg, 95, 64) @[md5.scala 165:24]
    node _GEN_139 = mux(_T_84, _r_io_m_T_40, _GEN_136) @[md5.scala 163:29 165:18]
    node _GEN_140 = mux(_T_84, UInt<5>("h4"), _GEN_137) @[md5.scala 163:29 166:18]
    node _GEN_141 = mux(_T_84, A_K_40, _GEN_138) @[md5.scala 163:29 167:18]
    node _T_85 = eq(phase, UInt<4>("h9")) @[md5.scala 163:20]
    node _r_io_m_T_41 = bits(msg, 223, 192) @[md5.scala 165:24]
    node _GEN_142 = mux(_T_85, _r_io_m_T_41, _GEN_139) @[md5.scala 163:29 165:18]
    node _GEN_143 = mux(_T_85, UInt<5>("hb"), _GEN_140) @[md5.scala 163:29 166:18]
    node _GEN_144 = mux(_T_85, A_K_41, _GEN_141) @[md5.scala 163:29 167:18]
    node _T_86 = eq(phase, UInt<4>("ha")) @[md5.scala 163:20]
    node _r_io_m_T_42 = bits(msg, 351, 320) @[md5.scala 165:24]
    node _GEN_145 = mux(_T_86, _r_io_m_T_42, _GEN_142) @[md5.scala 163:29 165:18]
    node _GEN_146 = mux(_T_86, UInt<5>("h10"), _GEN_143) @[md5.scala 163:29 166:18]
    node _GEN_147 = mux(_T_86, A_K_42, _GEN_144) @[md5.scala 163:29 167:18]
    node _T_87 = eq(phase, UInt<4>("hb")) @[md5.scala 163:20]
    node _r_io_m_T_43 = bits(msg, 479, 448) @[md5.scala 165:24]
    node _GEN_148 = mux(_T_87, _r_io_m_T_43, _GEN_145) @[md5.scala 163:29 165:18]
    node _GEN_149 = mux(_T_87, UInt<5>("h17"), _GEN_146) @[md5.scala 163:29 166:18]
    node _GEN_150 = mux(_T_87, A_K_43, _GEN_147) @[md5.scala 163:29 167:18]
    node _T_88 = eq(phase, UInt<4>("hc")) @[md5.scala 163:20]
    node _r_io_m_T_44 = bits(msg, 127, 96) @[md5.scala 165:24]
    node _GEN_151 = mux(_T_88, _r_io_m_T_44, _GEN_148) @[md5.scala 163:29 165:18]
    node _GEN_152 = mux(_T_88, UInt<5>("h4"), _GEN_149) @[md5.scala 163:29 166:18]
    node _GEN_153 = mux(_T_88, A_K_44, _GEN_150) @[md5.scala 163:29 167:18]
    node _T_89 = eq(phase, UInt<4>("hd")) @[md5.scala 163:20]
    node _r_io_m_T_45 = bits(msg, 255, 224) @[md5.scala 165:24]
    node _GEN_154 = mux(_T_89, _r_io_m_T_45, _GEN_151) @[md5.scala 163:29 165:18]
    node _GEN_155 = mux(_T_89, UInt<5>("hb"), _GEN_152) @[md5.scala 163:29 166:18]
    node _GEN_156 = mux(_T_89, A_K_45, _GEN_153) @[md5.scala 163:29 167:18]
    node _T_90 = eq(phase, UInt<4>("he")) @[md5.scala 163:20]
    node _r_io_m_T_46 = bits(msg, 383, 352) @[md5.scala 165:24]
    node _GEN_157 = mux(_T_90, _r_io_m_T_46, _GEN_154) @[md5.scala 163:29 165:18]
    node _GEN_158 = mux(_T_90, UInt<5>("h10"), _GEN_155) @[md5.scala 163:29 166:18]
    node _GEN_159 = mux(_T_90, A_K_46, _GEN_156) @[md5.scala 163:29 167:18]
    node _T_91 = eq(phase, UInt<4>("hf")) @[md5.scala 163:20]
    node _r_io_m_T_47 = bits(msg, 511, 480) @[md5.scala 165:24]
    node _GEN_160 = mux(_T_91, _r_io_m_T_47, _GEN_157) @[md5.scala 163:29 165:18]
    node _GEN_161 = mux(_T_91, UInt<5>("h17"), _GEN_158) @[md5.scala 163:29 166:18]
    node _GEN_162 = mux(_T_91, A_K_47, _GEN_159) @[md5.scala 163:29 167:18]
    node _T_95 = eq(phase, UInt<1>("h0")) @[md5.scala 179:20]
    node _r_io_m_T_48 = bits(msg, 31, 0) @[md5.scala 181:24]
    node _GEN_164 = mux(_T_95, _r_io_m_T_48, UInt<1>("h0")) @[md5.scala 179:29 181:18 67:10]
    node _GEN_165 = mux(_T_95, UInt<5>("h6"), UInt<1>("h0")) @[md5.scala 179:29 182:18 68:10]
    node _GEN_166 = mux(_T_95, A_K_48, UInt<1>("h0")) @[md5.scala 179:29 183:18 69:10]
    node _T_96 = eq(phase, UInt<1>("h1")) @[md5.scala 179:20]
    node _r_io_m_T_49 = bits(msg, 95, 64) @[md5.scala 181:24]
    node _GEN_167 = mux(_T_96, _r_io_m_T_49, _GEN_164) @[md5.scala 179:29 181:18]
    node _GEN_168 = mux(_T_96, UInt<5>("ha"), _GEN_165) @[md5.scala 179:29 182:18]
    node _GEN_169 = mux(_T_96, A_K_49, _GEN_166) @[md5.scala 179:29 183:18]
    node _T_97 = eq(phase, UInt<2>("h2")) @[md5.scala 179:20]
    node _r_io_m_T_50 = bits(msg, 159, 128) @[md5.scala 181:24]
    node _GEN_170 = mux(_T_97, _r_io_m_T_50, _GEN_167) @[md5.scala 179:29 181:18]
    node _GEN_171 = mux(_T_97, UInt<5>("hf"), _GEN_168) @[md5.scala 179:29 182:18]
    node _GEN_172 = mux(_T_97, A_K_50, _GEN_169) @[md5.scala 179:29 183:18]
    node _T_98 = eq(phase, UInt<2>("h3")) @[md5.scala 179:20]
    node _r_io_m_T_51 = bits(msg, 223, 192) @[md5.scala 181:24]
    node _GEN_173 = mux(_T_98, _r_io_m_T_51, _GEN_170) @[md5.scala 179:29 181:18]
    node _GEN_174 = mux(_T_98, UInt<5>("h15"), _GEN_171) @[md5.scala 179:29 182:18]
    node _GEN_175 = mux(_T_98, A_K_51, _GEN_172) @[md5.scala 179:29 183:18]
    node _T_99 = eq(phase, UInt<3>("h4")) @[md5.scala 179:20]
    node _r_io_m_T_52 = bits(msg, 287, 256) @[md5.scala 181:24]
    node _GEN_176 = mux(_T_99, _r_io_m_T_52, _GEN_173) @[md5.scala 179:29 181:18]
    node _GEN_177 = mux(_T_99, UInt<5>("h6"), _GEN_174) @[md5.scala 179:29 182:18]
    node _GEN_178 = mux(_T_99, A_K_52, _GEN_175) @[md5.scala 179:29 183:18]
    node _T_100 = eq(phase, UInt<3>("h5")) @[md5.scala 179:20]
    node _r_io_m_T_53 = bits(msg, 351, 320) @[md5.scala 181:24]
    node _GEN_179 = mux(_T_100, _r_io_m_T_53, _GEN_176) @[md5.scala 179:29 181:18]
    node _GEN_180 = mux(_T_100, UInt<5>("ha"), _GEN_177) @[md5.scala 179:29 182:18]
    node _GEN_181 = mux(_T_100, A_K_53, _GEN_178) @[md5.scala 179:29 183:18]
    node _T_101 = eq(phase, UInt<3>("h6")) @[md5.scala 179:20]
    node _r_io_m_T_54 = bits(msg, 415, 384) @[md5.scala 181:24]
    node _GEN_182 = mux(_T_101, _r_io_m_T_54, _GEN_179) @[md5.scala 179:29 181:18]
    node _GEN_183 = mux(_T_101, UInt<5>("hf"), _GEN_180) @[md5.scala 179:29 182:18]
    node _GEN_184 = mux(_T_101, A_K_54, _GEN_181) @[md5.scala 179:29 183:18]
    node _T_102 = eq(phase, UInt<3>("h7")) @[md5.scala 179:20]
    node _r_io_m_T_55 = bits(msg, 479, 448) @[md5.scala 181:24]
    node _GEN_185 = mux(_T_102, _r_io_m_T_55, _GEN_182) @[md5.scala 179:29 181:18]
    node _GEN_186 = mux(_T_102, UInt<5>("h15"), _GEN_183) @[md5.scala 179:29 182:18]
    node _GEN_187 = mux(_T_102, A_K_55, _GEN_184) @[md5.scala 179:29 183:18]
    node _T_103 = eq(phase, UInt<4>("h8")) @[md5.scala 179:20]
    node _r_io_m_T_56 = bits(msg, 63, 32) @[md5.scala 181:24]
    node _GEN_188 = mux(_T_103, _r_io_m_T_56, _GEN_185) @[md5.scala 179:29 181:18]
    node _GEN_189 = mux(_T_103, UInt<5>("h6"), _GEN_186) @[md5.scala 179:29 182:18]
    node _GEN_190 = mux(_T_103, A_K_56, _GEN_187) @[md5.scala 179:29 183:18]
    node _T_104 = eq(phase, UInt<4>("h9")) @[md5.scala 179:20]
    node _r_io_m_T_57 = bits(msg, 127, 96) @[md5.scala 181:24]
    node _GEN_191 = mux(_T_104, _r_io_m_T_57, _GEN_188) @[md5.scala 179:29 181:18]
    node _GEN_192 = mux(_T_104, UInt<5>("ha"), _GEN_189) @[md5.scala 179:29 182:18]
    node _GEN_193 = mux(_T_104, A_K_57, _GEN_190) @[md5.scala 179:29 183:18]
    node _T_105 = eq(phase, UInt<4>("ha")) @[md5.scala 179:20]
    node _r_io_m_T_58 = bits(msg, 191, 160) @[md5.scala 181:24]
    node _GEN_194 = mux(_T_105, _r_io_m_T_58, _GEN_191) @[md5.scala 179:29 181:18]
    node _GEN_195 = mux(_T_105, UInt<5>("hf"), _GEN_192) @[md5.scala 179:29 182:18]
    node _GEN_196 = mux(_T_105, A_K_58, _GEN_193) @[md5.scala 179:29 183:18]
    node _T_106 = eq(phase, UInt<4>("hb")) @[md5.scala 179:20]
    node _r_io_m_T_59 = bits(msg, 255, 224) @[md5.scala 181:24]
    node _GEN_197 = mux(_T_106, _r_io_m_T_59, _GEN_194) @[md5.scala 179:29 181:18]
    node _GEN_198 = mux(_T_106, UInt<5>("h15"), _GEN_195) @[md5.scala 179:29 182:18]
    node _GEN_199 = mux(_T_106, A_K_59, _GEN_196) @[md5.scala 179:29 183:18]
    node _T_107 = eq(phase, UInt<4>("hc")) @[md5.scala 179:20]
    node _r_io_m_T_60 = bits(msg, 319, 288) @[md5.scala 181:24]
    node _GEN_200 = mux(_T_107, _r_io_m_T_60, _GEN_197) @[md5.scala 179:29 181:18]
    node _GEN_201 = mux(_T_107, UInt<5>("h6"), _GEN_198) @[md5.scala 179:29 182:18]
    node _GEN_202 = mux(_T_107, A_K_60, _GEN_199) @[md5.scala 179:29 183:18]
    node _T_108 = eq(phase, UInt<4>("hd")) @[md5.scala 179:20]
    node _r_io_m_T_61 = bits(msg, 383, 352) @[md5.scala 181:24]
    node _GEN_203 = mux(_T_108, _r_io_m_T_61, _GEN_200) @[md5.scala 179:29 181:18]
    node _GEN_204 = mux(_T_108, UInt<5>("ha"), _GEN_201) @[md5.scala 179:29 182:18]
    node _GEN_205 = mux(_T_108, A_K_61, _GEN_202) @[md5.scala 179:29 183:18]
    node _T_109 = eq(phase, UInt<4>("he")) @[md5.scala 179:20]
    node _r_io_m_T_62 = bits(msg, 447, 416) @[md5.scala 181:24]
    node _GEN_206 = mux(_T_109, _r_io_m_T_62, _GEN_203) @[md5.scala 179:29 181:18]
    node _GEN_207 = mux(_T_109, UInt<5>("hf"), _GEN_204) @[md5.scala 179:29 182:18]
    node _GEN_208 = mux(_T_109, A_K_62, _GEN_205) @[md5.scala 179:29 183:18]
    node _T_110 = eq(phase, UInt<4>("hf")) @[md5.scala 179:20]
    node _r_io_m_T_63 = bits(msg, 511, 480) @[md5.scala 181:24]
    node _GEN_209 = mux(_T_110, _r_io_m_T_63, _GEN_206) @[md5.scala 179:29 181:18]
    node _GEN_210 = mux(_T_110, UInt<5>("h15"), _GEN_207) @[md5.scala 179:29 182:18]
    node _GEN_211 = mux(_T_110, A_K_63, _GEN_208) @[md5.scala 179:29 183:18]
    node _GEN_212 = mux(_T_93, UInt<2>("h3"), UInt<1>("h0")) @[md5.scala 170:27 173:14 70:10]
    node _GEN_214 = mux(_T_93, _GEN_209, UInt<1>("h0")) @[md5.scala 170:27 67:10]
    node _GEN_215 = mux(_T_93, _GEN_210, UInt<1>("h0")) @[md5.scala 170:27 68:10]
    node _GEN_216 = mux(_T_93, _GEN_211, UInt<1>("h0")) @[md5.scala 170:27 69:10]
    node _GEN_217 = mux(_T_74, UInt<2>("h2"), _GEN_212) @[md5.scala 154:27 157:14]
    node _GEN_219 = mux(_T_74, _GEN_160, _GEN_214) @[md5.scala 154:27]
    node _GEN_220 = mux(_T_74, _GEN_161, _GEN_215) @[md5.scala 154:27]
    node _GEN_221 = mux(_T_74, _GEN_162, _GEN_216) @[md5.scala 154:27]
    node _GEN_222 = mux(_T_55, UInt<1>("h1"), _GEN_217) @[md5.scala 138:27 141:14]
    node _GEN_224 = mux(_T_55, _GEN_111, _GEN_219) @[md5.scala 138:27]
    node _GEN_225 = mux(_T_55, _GEN_112, _GEN_220) @[md5.scala 138:27]
    node _GEN_226 = mux(_T_55, _GEN_113, _GEN_221) @[md5.scala 138:27]
    node _GEN_227 = mux(_T_36, UInt<1>("h0"), _GEN_222) @[md5.scala 122:21 125:14]
    node _GEN_229 = mux(_T_36, _GEN_62, _GEN_224) @[md5.scala 122:21]
    node _GEN_230 = mux(_T_36, _GEN_63, _GEN_225) @[md5.scala 122:21]
    node _GEN_231 = mux(_T_36, _GEN_64, _GEN_226) @[md5.scala 122:21]
    node _GEN_233 = mux(_T_118, B, UInt<1>("h0")) @[md5.scala 205:39 207:11 58:7]
    node _GEN_234 = mux(_T_118, C, UInt<1>("h0")) @[md5.scala 205:39 208:11 59:7]
    node _GEN_235 = mux(_T_118, D, UInt<1>("h0")) @[md5.scala 205:39 209:11 60:7]
    node _GEN_236 = mux(_T_118, A, UInt<1>("h0")) @[md5.scala 205:39 210:11 61:7]
    node _GEN_238 = mux(_T_116, C, _GEN_233) @[md5.scala 199:39 201:11]
    node _GEN_239 = mux(_T_116, D, _GEN_234) @[md5.scala 199:39 202:11]
    node _GEN_240 = mux(_T_116, A, _GEN_235) @[md5.scala 199:39 203:11]
    node _GEN_241 = mux(_T_116, B, _GEN_236) @[md5.scala 199:39 204:11]
    node _GEN_244 = mux(_T_114, D, _GEN_238) @[md5.scala 193:39 195:11]
    node _GEN_245 = mux(_T_114, A, _GEN_239) @[md5.scala 193:39 196:11]
    node _GEN_246 = mux(_T_114, B, _GEN_240) @[md5.scala 193:39 197:11]
    node _GEN_247 = mux(_T_114, C, _GEN_241) @[md5.scala 193:39 198:11]
    node _GEN_251 = mux(_T_112, A, _GEN_244) @[md5.scala 187:33 189:11]
    node _GEN_252 = mux(_T_112, B, _GEN_245) @[md5.scala 187:33 190:11]
    node _GEN_253 = mux(_T_112, C, _GEN_246) @[md5.scala 187:33 191:11]
    node _GEN_254 = mux(_T_112, D, _GEN_247) @[md5.scala 187:33 192:11]
    node _GEN_258 = mux(_T_34, _GEN_227, UInt<1>("h0")) @[md5.scala 120:58 70:10]
    node _GEN_260 = mux(_T_34, _GEN_229, UInt<1>("h0")) @[md5.scala 120:58 67:10]
    node _GEN_261 = mux(_T_34, _GEN_230, UInt<1>("h0")) @[md5.scala 120:58 68:10]
    node _GEN_262 = mux(_T_34, _GEN_231, UInt<1>("h0")) @[md5.scala 120:58 69:10]
    node _GEN_264 = mux(_T_34, _GEN_251, UInt<1>("h0")) @[md5.scala 120:58 58:7]
    node _GEN_265 = mux(_T_34, _GEN_252, UInt<1>("h0")) @[md5.scala 120:58 59:7]
    node _GEN_266 = mux(_T_34, _GEN_253, UInt<1>("h0")) @[md5.scala 120:58 60:7]
    node _GEN_267 = mux(_T_34, _GEN_254, UInt<1>("h0")) @[md5.scala 120:58 61:7]
    node cya = _GEN_264 @[md5.scala 37:17]
    node _GEN_271 = mux(_T_34, cya, UInt<1>("h0")) @[md5.scala 120:58 213:12 63:10]
    node cyb = _GEN_265 @[md5.scala 38:17]
    node _GEN_272 = mux(_T_34, cyb, UInt<1>("h0")) @[md5.scala 120:58 214:12 64:10]
    node cyc = _GEN_266 @[md5.scala 39:17]
    node _GEN_273 = mux(_T_34, cyc, UInt<1>("h0")) @[md5.scala 120:58 215:12 65:10]
    node cyd = _GEN_267 @[md5.scala 40:17]
    node _GEN_274 = mux(_T_34, cyd, UInt<1>("h0")) @[md5.scala 120:58 216:12 66:10]
    io_out <= _io_out_T_2 @[md5.scala 56:10]
    io_out_valid <= out_r @[md5.scala 54:16]
    io_ready <= _io_ready_T_1 @[md5.scala 55:12]
    A <= mux(reset, A_A, _GEN_8) @[md5.scala 19:{18,18}]
    B <= mux(reset, A_B, _GEN_9) @[md5.scala 20:{18,18}]
    C <= mux(reset, A_C, _GEN_10) @[md5.scala 21:{18,18}]
    D <= mux(reset, A_D, _GEN_11) @[md5.scala 22:{18,18}]
    AA <= mux(reset, UInt<32>("h0"), _GEN_4) @[md5.scala 23:{19,19}]
    BB <= mux(reset, UInt<32>("h0"), _GEN_5) @[md5.scala 24:{19,19}]
    CC <= mux(reset, UInt<32>("h0"), _GEN_6) @[md5.scala 25:{19,19}]
    DD <= mux(reset, UInt<32>("h0"), _GEN_7) @[md5.scala 26:{19,19}]
    phase <= mux(reset, UInt<4>("h0"), _GEN_12) @[md5.scala 31:{22,22}]
    state <= mux(reset, UInt<8>("h1"), next_state) @[md5.scala 32:{22,22} 73:9]
    msg <= mux(reset, UInt<512>("h0"), _GEN_14) @[md5.scala 34:{20,20}]
    out_r <= mux(reset, UInt<1>("h0"), _out_r_T_1) @[md5.scala 35:{22,22} 53:9]
    r.clock <= clock
    r.reset <= reset
    r.io_a <= _GEN_271
    r.io_b <= _GEN_272
    r.io_c <= _GEN_273
    r.io_d <= _GEN_274
    r.io_m <= _GEN_260
    r.io_s <= _GEN_261
    r.io_t <= _GEN_262
    r.io_r <= _GEN_258
